1. Field of the Invention
This invention relates to the manufacture of integrated circuit structures.
In the design and fabrication of high yield low cost silicon integrated devices it is frequently desirable to be able to obtain precisely shaped and sized zones for example buried zones and/or isolation zones of required conductivity type within single crystal substrate structures. That is to say, it is desirable to have p type or n type material located within a region of the substrate of the opposite conductivity, or it is desirable to have various combinations of n, p: n- p-; n+; p+ conductivities in a substrate.
The zones of various conductivity properties are used to fabricate various electrical components and are usually produced by a combination of diffusion and epitaxial techniques. The diffusion techniques make it possible to deposit on to a substrate silicon oxide layers with selected amounts of impurity materials so as to achieve a selected conductivity property, i.e., n-, p-; n, p; p+ or n+. Furthermore, the choice of material also enables control over the rate at which materials can diffuse into the substrate.
A known method of forming such an isolated zone involves applying to the surface of a silicon substrate having a first conductivity, for example, p conductivity a layer of SiO.sub.2. A pattern is formed in the SiO.sub.2 layer, the pattern defining the position and size of the required isolated zone, by any conventional method used in the art, for example a method employing a photo-resist.
A layer of a silicon oxide doped with, for example, arsenic which will provide an n+ conductivity is applied onto the previously applied layer and into the gaps defined by the pattern. The thus produced substrate and the silicon oxide layers are subjected to a heat treatment which causes the arsenic to diffuse into the silicon substrate. The arsenic is able to enter the substrate at only those place(s) defined by the pattern since the silicon oxide layer initially applied to the substrate blocks the passage of the arsenic.
After the diffusion stage the oxide layers are removed and, if necessary, the surface of the substrate is cleaned by a suitable treatment. If it is desired to form a buried layer, this is followed by the application of an epitaxial layer which essentially forms with the substrate a continuation of the single crystal of the substrate which effectively buries the zone containing the diffused arsenic. This epitaxial layer conveniently has an n conductivity.
The use of a buried layer is convenient whenever a transistor is required in the completed integrated circuit. The buried layer of arsenic forms a low resistivity layer which is usually located beneath the collector junction of the transistor which is subsequently formed on the epitaxial layer by further depositioning of oxide layers, the diffusion stages. To isolate the area of the N epitaxial layer grown above the buried N+ diffusion from the remainder of the crystal by conventional techniques, a layer of silicon dioxide is grown on the top surface and a channel is cut in it to surround the buried diffused area. An oxide doped with boron is deposited on the top surface and heated so as to diffuse the boron into the epitaxial layer to link up with the P doped starting material. The N and the buried N+ diffusion are now totally surrounded by P doped silicon and, hence, are isolated provided the P silicon is held at the most negative voltage applied to the integrated circuit.
The remaining layers can be applied as follows. A silicon dioxide layer is applied to the surface of the epitaxial layer.
A further pattern is provided in this silicon oxide layer by a photo resist method and a further silicon. oxide layer containing an additive, e.g., boron, is applied to this second layer. The device as so far produced is subjected to a diffusion stage to drive-in the p type material to form the base of the transistor.
The required emitter pattern is formed by photo-engraving techniques and silicon oxide containing an n+ additive is applied to the device, the n+ material being, for example, arsenic or phosphorous. The n+ material is driven into the substrate material by a further diffusion process.
In the known processes such as are exemplified by the above it is necessary to undertake a diffusion stage for each layer as it is applied. In practice, as is well known, this will involve a number of process steps.
It is an object of the invention to reduce the number of process steps involved in order to produce a buried and/or isolated layer.